NIST CNST Nanofab Equipment
FURNACES/CVD

Certain commercial equipment, and software, are identified in this documentation to describe the subject adequately. Such identification does not imply recommendation or endorsement by the NIST, nor does it imply that the equipment identified is necessarily the best available for the purpose.

• Silicon Dioxide Growth
  • Wet Oxide (T1)-typically used for field isolation, masking layers, oxides greater than 120 nm, and optical applications.
  • Dry Oxide (T2)-slow controlled growth, oxides less than 120 nm.
• Forming Gas Anneal (T3)
  • Aluminum Sinter, anneal.
• General Anneal (T4)
  • Nitrogen ambient anneals.

• 3", 4" and 6" wafers.
• Maximum wafer thickness: 2.5 mm

• Silicon Wafers Allowed.
• Pyrex and glass slides permitted with temperatures below melting point!
• All other substrates need approval.
• Max. Temperature 1100 °C.

• Silicon Dioxide Growth
  • Wet Oxide (T1)-typically used for field isolation, masking layers, oxides greater than 120 nm, gate dielectric studies, and optical applications.
  • Dry Oxide (T2)-CMOS gate growth, slow controlled growth, oxides less than 120 nm.
• Boron Solid Source Diffusion (Bank1,T3)
  • Wafer doping technique for P-type applications.
• Phosphorus Solid Source Diffusion (Bank2,T4)
  • Wafer doping technique for N-type applications.

• 3", 4" and 6" wafers.
• Maximum wafer thickness: 2.5 mm.

• The dry oxide tube (T2) and the wet oxide tube (T1) are for CMOS applications only.
• Requires quarterly monitoring and monthly Trans-LC cleans.
• No Metals.
• Use only teflon tweezers, green wafer tweezers, or vacuum wand.
• RCA Cleaning required before processing.
• Silicon Wafers Only
• Max. Temp 1100 °C.

• Tube 1 (T1), open for future upgrade.
• Silicon Nitride Deposition (T2)
  • Low Stress recipe.
  • Stoichiometric recipe.
  • Waveguides, passivation layer, masking layer, dielectric applications.
• Polysilicon Deposition (T3).
  • Silicon gate devices.
  • Use as conductors.
• LTO-Low Temperature Oxidation (T4)
  • Inter level metal isolation.
  • Low temperature process < 450 °C.

• Short time, high temperature anneals.
• Growth of Silicon Dioxide.
• Activate dopants after ion-implant.
• CVD glass reflows.
• Sintering.

• Low Temperature film deposition
• Film types: Silicon Dioxide, Silicon Nitride, Polysilicon
• Low stress films
• Inter-level metal isolation

• No photoresist.
• No plastic or PDMS.
• Glass and Silicon Substrates allowed.
• All other substrates need approval.