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• General Thermal Oxidation
• CMOS Thermal Oxidation
• LPCVD Furnace
• Rapid Thermal Annealer
• PECVD
 

NIST CNST NanoFab Equipment
FURNACES/CVD

Certain commercial equipment, and software, are identified in this documentation to describe the subject adequately. Such identification does not imply recommendation or endorsement by the NIST, nor does it imply that the equipment identified is necessarily the best available for the purpose.


This four stack furnace system is utilized to grow silicon dioxide, general anneal and sinter.

Applications:
  • Silicon Dioxide Growth
    • Wet Oxide (Tube 1)-typically used for field isolation, masking layers, oxides greater than 120 nm, and optical applications.
    • Dry Oxide (Tube 2)-slow controlled growth, oxides less than 120 nm.
  • Forming Gas Anneal (Tube 3)
    • Aluminum Sinter, anneal.
  • General Anneal (Tube 4)
    • Nitrogen ambient anneals.
Sample Sizes:
  • 3", 4" and 6" wafers.
  • Maximum wafer thickness: 2.5 mm
Restrictions:
  • Silicon Wafers Allowed.
  • Pyrex and glass slides permitted with temperatures below melting point!
  • All other substrates need approval.
  • Max. Temperature 1100 °C.
Demonstrated use: Etch masking layers, insulation layers

General Furnace
 

This four-stack furnace bank is used for the thermal growth of silicon dioxide and diffusion by solid source.

Applications:
  • Silicon Dioxide Growth
    • Wet Oxide (Tube 1)-typically used for field isolation, masking layers, oxides greater than 120 nm, gate dielectric studies, and optical applications.
    • Dry Oxide (Tube 2)-CMOS gate growth, slow controlled growth, oxides less than 120 nm.
  • Boron Solid Source Diffusion (Tube 3)
    • Wafer doping technique for P-type applications.
  • Phosphorus Solid Source Diffusion (Tube 4)
    • Wafer doping for N-type applications.
Sample Sizes:
  • 3", 4" and 6" wafers.
  • Maximum wafer thickness: 2.5 mm.
Restrictions:
  • The dry oxide tube (Tube 2) and the wet oxide tube (Tube 1) are for CMOS applications only.
  • Requires quarterly monitoring and monthly Trans-LC cleans.
  • No Metals.
  • Use only Teflon tweezers, green wafer tweezers, or vacuum wand.
  • RCA Cleaning required before processing.
  • Silicon Wafers Only
  • Max. Temp 1100 °C.
Demonstrated use: Etch masking layers, Insulation layers, Sub-2nm gate dielectric
CMOS furnace
 

This three stack furnace system is utilized to deposit silicon nitride, polysilicon and low temperature oxide (LTO).

Applications:
  • Tube 1 (T1), open for future upgrade.
  • Silicon Nitride Deposition (Tube 2)
    • Low Stress recipe.
    • Stoichiometric recipe.
    • Waveguides, passivation layer, masking layer, dielectric applications.
    • Low stress nitride for membrane fabrication
  • Polysilicon Deposition (Tube 3).
    • Silicon gate devices.
    • Use as conductors.
  • LTO-Low Temperature Oxidation (Tube 4)
    • Inter level metal isolation.
    • Low temperature process < 450 °C.
Sample Sizes: 3", 4" and 6" wafers.

Restrictions: No photoresist or plastic substrates.

Demonstrated use: Etch masking layers, insulation layers, low stress silicon nitride for membranes

LPCVD Furnace
 

This system uses 21-1200W lamps to control temperature ramps and steady state temperatures from 250 degrees to 1200 degrees C anneals.

Applications:
  • Short time, high temperature anneals.
  • Growth of Silicon Dioxide.
  • Activate dopants after ion-implant.
  • CVD glass reflows.
  • Sintering.
Sample Size: Pieces, 3", 4" and 6" wafers

Restrictions: Silicon Wafers only

Rapid Thermal Annealer
 
Applications:
  • Low Temperature film deposition
  • Film types: Silicon dioxide, silicon nitride, oxi-nitride, and polysilicon
  • Low stress films
  • Inter-level metal isolation
  • Masking layers
Sample Size: From small size samples to 200mm wafers.

Restrictions:
  • No photoresist.
  • No plastic or PDMS.
  • Glass and Silicon Substrates allowed.
  • All other substrates need approval.
Demonstrated use: Dielectric interlayers, contacts, etch masking, passivation.

PECVD-Unaxis 790

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Online: February 2006
Last Updated: September 2008

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